Listing 1: “Hello World!” in LC-3.
The above listing is a typical hello world program written in LC-3 assembly language. The program
outputs “Hello World!” to the console and quits. We will now look at the composition of this
program.
Lines 1 and 2 of the program are comments. LC-3 uses the semi-colon to denote the beginning
of a comment, the same way C++ uses “//” to start a comment on a line. As you probably already
know, comments are very helpful in programming in high-level languages such as C++ or Java. You
will find that they are even more necessary when writing assembly programs. For example in C++,
the subtraction of two numbers would only take one statement, while in LC-3 subtraction usually
takes three instructions, creating a need for further clarity through commenting.
Line 3 contains the .ORIG pseudo-op. A pseudo-op is an instruction that you can use when
writing LC-3 assembly programs, but there is no corresponding instruction in LC-3’s instruction
set. All pseudo-ops start with a period. The best way to think of pseudo-ops are the same way you
would think of preprocessing directives in C++. In C++, the #include statement is really not a C++
statement, but it is a directive that helps a C++ complier do its job. The .ORIG pseudo-op, with its
numeric parameter, tells the assembler where to place the code in memory.
Memory in LC-3 can be thought of as one large 16-bit array. This array can hold LC-3 instructions or it can hold data values that those instructions will manipulate. The standard place for code
to begin at is memory location x3000. Note that the “x” in front of the number indicates it is in
hexadecimal. This means that the “.ORIG x3000” statement will put “LEA R0, HW” in memory
location x3000, “PUTS” will go into memory location x3001, “HALT” into memory location x3002,
and so on until the entire program has been placed into memory. All LC-3 programs begin with the
.ORIG pseudo-op.
Lines 4 and 5 are LC-3 instructions. The first instruction, loads the address of the “Hello World!”
Revision: 1.17, January 20, 2007 viiProgramming in LC-3
string and the next instruction prints the string to the console. It is not important to know how these
instructions actually work right now, as they will be covered in the labs.
Line 6 is the HALT instruction. This instruction tells the LC-3 simulator to stop running the
program. You should put this in the spot where you want to end your program.
Line 7 is another pseudo-op .STRINGZ. After the main program code section, that was ended
by HALT, you can use the pseudo-ops, .STRINGZ, .FILL, and .BLKW to save space for data that
you would like to manipulate in the program. This is a similar idea to declaring variables in C++.
The .STRINGZ pseudo-op in this program saves space in memory for the “Hello World!” string.
Line 8 contains the .END pseudo-op. This tells the assembler that there is no more code to assemble. This should be the very last instruction in your assembly code file. .END can be sometimes
confused with the HALT instruction. HALT tells the simulator to stop a program that is running.
.END indicates where the assembler should stop assembling your code into a program.
Syntax of an LC-3 Instruction
Each LC-3 instruction appears on line of its own and can have up to four parts. These parts in order
are the label, the opcode, the operands, and the comment.
Each instruction can start with a label, which can be used for a variety of reasons. One reason
is that it makes it easier to reference a data variable. In the hello world example, line 7 contains
the label “HW.” The program uses this label to reference the “Hello World!” string. Labels are also
used for branching, which are similar to labels and goto’s in C++. Labels are optional and if an
instruction does not have a label, usually empty space is left where one would be.
The second part of an instruction is the opcode. This indicates to the assembler what kind of
instruction it will be. For example in line 4, LEA indicates that the instruction is a load effective
address instruction. Another example would be ADD, to indicate that the instruction is an addition
instruction. The opcode is mandatory for any instruction.
Operands are required by most instructions. These operands indicate what data the instruction
will be manipulating. The operands are usually registers, labels, or immediate values. Some instructions like HALT do not require operands. If an instruction uses more than one operand like LEA in
the example program, then they are separated by commas.
Lastly an instruction can also have a comment attached to it, which is optional. The operand
section of an instruction is separated from the comment section by a semicolon.
LC-3 Memory
LC-3 memory consists of 216 locations, each being 16 bits wide. Each location is identified with an
address, a positive integer in the range 0 through 216 ? 1. More often we use 4-digit hexadecimal
numbers for the addresses. Hence, addresses range from x0000 to xFFFF.
The LC-3 memory with its various regions is shown in figure 1 on page ix.
viiiProgramming in LC-3
xE000
x0000 ? x00FF Trap Vector Table
x0100 ? x01FF Interrupt Vector Table
x0200 ? x2FFF OS and Supervisor Stack
x3000 ? xFDFF User Program Area
xFE00 ? xFFFF Device Register Addresses
Key
x0000
x1000
x2000
x3000
x4000
x5000
x6000
x7000
x8000
x9000
xA000
xB000
xC000
xD000
xFFFF
xF000
Figure 1: LC-3 memory map: the various regions.
ixLC3 Quick Reference Guide
Instruction Set
Op Format Description Example
ADD ADD DR, SR1, SR2
ADD DR, SR1, imm5
Adds the values in SR1 and
SR2/imm5 and sets DR to that
value.
ADD R1, R2, #5
The value 5 is added to the value in
R2 and stored in R1.
AND AND DR, SR1, SR2
AND DR, SR1, imm5
Performs a bitwise and on the
values in SR1 and SR2/imm5
and sets DR to the result.
AND R0, R1, R2
A bitwise and is preformed on the
values in R1 and R2 and the result
stored in R0.
BR BR(n/z/p) LABEL
Note: (n/z/p) means
any combination of
those letters can appear
there, but must be in
that order.
Branch to the code section
indicated by LABEL, if the bit
indicated by (n/z/p) has been set
by a previous instruction. n:
negative bit, z: zero bit, p:
positive bit. Note that some
instructions do not set condition
codes bits.
BRz LPBODY
Branch to LPBODY if the last
instruction that modified the
condition codes resulted in zero.
BRnp ALT1
Branch to ALT1 if last instruction
that modified the condition codes
resulted in a positive or negative
(non-zero) number.
JMP JMP SR1 Unconditionally jump to the
instruction based upon the
address in SR1.
JMP R1
Jump to the code indicated by the
address in R1.
JSR JSR LABEL Put the address of the next
instruction after the JSR
instruction into R7 and jump to
the subroutine indicated by
LABEL.
JSR POP
Store the address of the next
instruction into R7 and jump to the
subroutine POP.
JSRR JSSR SR1 Similar to JSR except the
address stored in SR1 is used
instead of using a LABEL.
JSSR R3
Store the address of the next
instruction into R7 and jump to the
subroutine indicated by R3’s value.
LD LD DR, LABEL Load the value indicated by
LABEL into the DR register.
LD R2, VAR1
Load the value at VAR1 into R2.
LDI LDI DR, LABEL Load the value indicated by the
address at LABEL’s memory
location into the DR register.
LDI R3, ADDR1
Suppose ADDR1 points to a
memory location with the value
x3100. Suppose also that memory
location x3100 has the value 8. 8
then would be loaded into R3.
LDR LDR DR, SR1, offset6 Load the value from the memory
location found by adding the
value of SR1 to offset6 into DR.
LDR R3, R4, #-2
Load the value found at the address
(R4 –2) into R3.
LEA LEA DR, LABEL Load the address of LABEL into
DR.
LEA R1, DATA1
Load the address of DATA1 into
R1.
NOT NOT DR, SR1 Performs a bitwise not on SR1
and stores the result in DR.
NOT R0, R1
A bitwise not is preformed on R1
and the result is stored in R0.
RET RET Return from a subroutine using
the value in R7 as the base
address.
RET
Equivalent to JMP R7.
LC-3 Quick Reference Guide
xRTI RTI Return from an interrupt to the
code that was interrupted. The
address to return to is obtained
by popping it off the supervisor
stack, which is automatically
done by RTI.
RTI
Note: RTI can only be used if the
processor is in supervisor mode.
ST ST SR1, LABEL Store the value in SR1 into the
memory location indicated by
LABEL.
ST R1, VAR3
Store R1’s value into the memory
location of VAR3.
STI STI SR1, LABEL Store the value in SR1 into the
memory location indicated by
the value that LABEL’s memory
location contains.
STI R2, ADDR2
Suppose ADDR2’s memory
location contains the value x3101.
R2’s value would then be stored
into memory location x3101.
STR STR SR1, SR2, offset6 The value in SR1 is stored in the
memory location found by
adding SR2 and offest6 together.
STR R2, R1, #4
The value of R2 is stored in
memory location (R1 + 4).
TRAP TRAP trapvector8 Performs the trap service
specified by trapvector8. Each
trapvector8 service has its own
assembly instruction that can
replace the trap instruction.
TRAP x25
Calls a trap service to end the
program. The assembly instruction
HALT can also be used to replace
TRAP x25.
Symbol Legend
Symbol Description Symbol Description
SR1, SR2 Source registers used by instruction. LABEL Label used by instruction.
DR Destination register that will hold
the instruction’s result.
trapvector8 8 bit value that specifies trap service
routine.
imm5 Immediate value with the size of 5
bits.
offset6 Offset value with the size of 6 bits.
TRAP Routines
Trap Vector Equivalent Assembly
Instruction
Description
x20 GETC Read one input character from the keyboard and store it into R0
without echoing the character to the console.
x21 OUT Output character in R0 to the console.
x22 PUTS Output null terminating string to the console starting at address
contained in R0.
x23 IN Read one input character from the keyboard and store it into R0 and
echo the character to the console.
x24 PUTSP Same as PUTS except that it outputs null terminated strings with
two ASCII characters packed into a single memory location, with
the low 8 bits outputted first then the high 8 bits.
x25 HALT Ends a user’s program.
Pseudo-ops
Pseudo-op Format Description
.ORIG .ORIG # Tells the LC-3 simulator where it should place the segment of
code starting at address #.
.FILL .FILL # Place value # at that code line.
.BLKW .BLKW # Reserve # memory locations for data at that line of code.
.STRINGZ .STRINGZ “<String>” Place a null terminating string <String> starting at that location.
.END .END Tells the LC-3 assembler to stop assembling your code.
LC-3 Quick Reference Guide
xiLC-3 Quick Reference Guide
xiiLAB 1
ALU Operations
1.1 Problem Statement
The numbers X and Y are found at locations x3100 and x3101, respectively. Write an LC-3 assembly
language program that does the following.
? Compute the sum X +Y and place it at location x3102.
? Compute X AND Y and place it at location x3103.
? Compute X OR Y and place it at location x3104.
? Compute NOT(X) and place it at location x3105.
? Compute NOT(Y) and place it at location x3106.
? Compute X +3 and place it at location x3107.
? Compute Y ?3 and place it at location x3108.
? If the X is even, place 0 at location x3109. If the number is odd, place 1 at the same location.
The operations AND, OR, and NOT are bitwise. The operation signified by + is the usual
arithmetic addition.
1.1.1 Inputs
The numbers X and Y are in locations x3100 and x3101, respectively:
x3100 X
x3101 Y
1.1.2 Outputs
The outputs at their corresponding locations are as follows:
Revision: 1.12, January 20, 2007 1–1LAB 1 1.2. INSTRUCTIONS IN LC-3
x3102 X +Y
x3103 X AND Y
x3104 X OR Y
x3105 NOT(X)
x3106 NOT(Y)
x3107 X +3
x3108 Y ?3
x3109 Z
where Z is defined as
Z = (0 if 1 if X X is even is odd. (1.1)
1.2 Instructions in LC-3
LC-3 has available these ALU instructions: ADD (arithmetic addition), AND (bitwise and), NOT
(bitwise not).
1.2.1 Addition
Adding two integers is done using the ADD instruction. In listing 1.1, the contents of registers R1
and R2 and added and the result is placed in R3. Note the values of integers can be negative as well,
since they are in two’s complement format. ADD also comes in immediate version, where the second
operand can be a constant integer. For example, we can use it to add 4 to register R1 and place the
result in register R3. See listing 1.1. The constant is limited to 5 bits two’s complement format.
Note, as with all other ALU instructions, the same register can serve both as a source operand and
the destination register.
1 ; Adding two r e g i s t e r s
2 ADD R3 , R1 , R2 ; R3 ← R1 + R2
3 ; Adding a r e g i s t e r and a c o n s t a n t
4 ADD R3 , R1 , #4 ; R3 ← R1 + 4
5 ; Adding a r e g i s t e r and a n e g a t i v e c o n s t a n t
6 ADD R3 , R1 , #?4 ; R3 ← R1 ? 4
7 ; Adding a r e g i s t e r to i t s e l f
8 ADD R1 , R1 , R1 ; R1 ← R1 + R1
Listing 1.1: The ADD instruction.
1.2.2 Bitwise AND
Two registers can be bitwise ANDed using the AND instruction, as in listing 1.2 on page 1–3. AND
also comes in the immediate version. Note that an immediate operand can be given in hexadecimal
form using x followed by the number.
1.2.3 Bitwise NOT
The bits of a register can be inverted (flipped) using the bitwise NOT instruction, as in listing 1.3 on
page 1–3.
1–2LAB 1 1.3. HOW TO DETERMINE WHETHER AN INTEGER IS EVEN OR ODD
1 ; Anding two r e g i s t e r s
2 AND R3 , R1 , R2 ; R3 ← R1 AND R2
3 ; Anding a r e g i s t e r and a c o n s t a n t
4 ADD R3 , R1 , xA ; R3 ← R1 AND 0000000000001010
Listing 1.2: The AND instruction.
1 ; I n v e r t i n g the b i t s of r e g i s t e r R1
2 NOT R2 , R1 ; R2 ← NOT(R1)
Listing 1.3: The NOT instruction.
1.2.4 Bitwise OR
LC-3 does not provide the bitwise OR instruction. We can use, however, AND and NOT to built it.
For this purpose, we make use of De Morgan’s rule: X OR Y = NOT(NOT(X) AND NOT(Y)). See
listing 1.4.
1 ; ORing two r e g i s t e r s
2 NOT R1 , R1 ; R1 ← NOT(R1)
3 NOT R2 , R2 ; R2 ← NOT(R2)
4 AND R3 , R1 , R2 ; R3 ← NOT(R1) AND NOT(R2)
5 NOT R3 , R3 ; R3 ← R1 OR R2
Listing 1.4: Implementing the OR operation.
1.2.5 Loading and storing with LDR and STR
The instruction LDR can be used to load the contents of a memory location into a register. Knowing
that X and Y are at locations x3100 and x3101, respectively, we can use the code in listing 1.5 on
page 1–4 to load them in registers R1 and R3, respectively. In the same figure one can see how
the instruction STR is used store the contents of a register to a memory location. The instruction
LEA R2, Offset loads register R2 with the address (PC + 1 + Offset), where PC is the address
of the instruction LEA and Offset is a numerical value, i.e. the immediate operand. Figure 1.2 on
page 1–5 shows the steps it takes to execute the LEA R2, xFF instruction.
If instead of a numerical value, a label is given, such as in instruction LEA R2, LABEL , then
the value of the immediate operand, i.e. the offset, is automatically computed so that R2 is loaded
with the address of the instruction with label LABEL.
1.3 How to determine whether an integer is even or odd
In binary, when a number is even it ends with a 0, and when it is odd, it ends with a 1. We can obtain
0 or 1, correspondingly, by using the AND instruction as in listing 1.6 on page 1–4. This method is
valid for numbers in two’s complement format, which includes negative numbers.
1.4 Testing
Test your program for several input pairs of X and Y. In figure 1.1 on page 1–4 an example is shown
of how memory should look after the program is run. The contents of memory are shown in decimal,
1–3LAB 1 1.5. WHAT TO TURN IN
1 ; Values X and Y are loaded i n t o r e g i s t e r s R1 and R3.
2 .ORIG x3000 ; Address where program code begins
3 ; R2 i s loaded with the beginning address of the data
4 LEA R2 , xFF ; R2 ← x3000 + x1 + xFF (= x3100 )
5 ; X, which i s l o c a t e d a t x3100 , i s loaded i n t o R1
6 LDR R1 , R2 , x0 ; R1 ← MEM[ x3100 ]
7 ; Y, which i s l o c a t e d a t x3101 , i s loaded i n t o R3
8 LDR R3 , R2 , x1 ; R3 ← MEM[ x3100 + x1 ]
9 . . .
10 ; S t o r i n g 5 in memory l o c a t i o n x3101
11 AND R4 , R4 , x0 ; Clear R4
12 ADD R4 , R4 , x5 ; R4 ← 5
13 STR R4 , R2 , x1 ; MEM[ x3100 + x1 ] ← R4
Listing 1.5: Loading and storing examples.
1 AND R2 , R1 , x0001 ; R2 has the value of the l e a s t
2 ; s i g n i f i c a n t b i t of R1.
Listing 1.6: Determining whether a number is even or odd.
hexadecimal, and binary format.
Address Decimal Hex Binary Contents
x3100 9 0009 0000 0000 0000 1001 X
x3101 -13 FFF3 1111 1111 1111 0011 Y
x3102 -4 FFFC 1111 1111 1111 1100 X +Y
x3103 1 0001 0000 0000 0000 0001 X AND Y
x3104 -5 FFFB 1111 1111 1111 1011 X OR Y
x3105 65526 FFF6 1111 1111 1111 0110 NOT(X)
x3106 12 000C 0000 0000 0000 1100 NOT(Y)
x3107 12 000C 0000 0000 0000 1100 X +3
x3108 -16 FFF0 1111 1111 1111 0000 Y ?3
x3108 1 0001 0000 0000 0000 0001 z
Figure 1.1: Example run.
1.5 What to turn in
? A hardcopy of the assembly source code.
? Electronic version of the assembly code.
? For each of the (X,Y) pairs (10,20),(?11,15),(11,?15),(9,12), screenshots that show the
contents of location x3100 through x3108.
1–4LAB 1 1.5. WHAT TO TURN IN
and storing the result into R2.
